DIGITAL CONTROLLED OSCILLATOR (DCO) FOR ALL DIGITAL PHASE-LOCKED LOOP (ADPLL) – A REVIEW

Authors

  • Florence Choong Engineering and Physical Sciences, Heriot-Watt University, No. 1, Jalan Venna P5/2, Precinct 5, 62200 Putrajaya, Malaysia
  • Mamun Ibne Reaz Department of Electrical, Electronic and Systems Engineering, Universiti Kebangsaan Malaysia, 43600 Bangi, Selangor, Malaysia
  • Mohamad Ibrahim Kamaruzzaman Department of Electrical, Electronic and Systems Engineering, Universiti Kebangsaan Malaysia, 43600 Bangi, Selangor, Malaysia
  • Md. Torikul Islam Badal Department of Electrical, Electronic and Systems Engineering, Universiti Kebangsaan Malaysia, 43600 Bangi, Selangor, Malaysia
  • Araf Farayez Department of Electrical, Electronic and Systems Engineering, Universiti Kebangsaan Malaysia, 43600 Bangi, Selangor, Malaysia
  • Maria Liz Crespo Abdus Salam International Centre for Theoretical Physics, Multidisciplinary Laboratory (MLab), Trieste, Italy
  • Andres Cicuttin Abdus Salam International Centre for Theoretical Physics, Multidisciplinary Laboratory (MLab), Trieste, Italy

DOI:

https://doi.org/10.11113/jt.v82.12833

Keywords:

Digital controlled oscillator (DCO), all digital phase-locked loop (ADPLL), complementary metal-oxide semiconductor (CMOS), phase-locked loop, low power

Abstract

Digital controlled oscillator (DCO) is becoming an attractive replacement over the voltage control oscillator (VCO) with the advances of digital intensive research on all-digital phase locked-loop (ADPLL) in complementary metal-oxide semiconductor (CMOS) process technology. This paper presents a review of various CMOS DCO schemes implemented in ADPLL and relationship between the DCO parameters with ADPLL performance. The DCO architecture evaluated through its power consumption, speed, chip area, frequency range, supply voltage, portability and resolution. It can be concluded that even though there are various schemes of DCO that have been implemented for ADPLL, the selection of the DCO is frequently based on the ADPLL applications and the complexity of the scheme. The demand for the low power dissipation and high resolution DCO in CMOS technology shall remain a challenging and active area of research for years to come. Thus, this review shall work as a guideline for the researchers who wish to work on all digital PLL.

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Published

2019-12-04

Issue

Section

Science and Engineering

How to Cite

DIGITAL CONTROLLED OSCILLATOR (DCO) FOR ALL DIGITAL PHASE-LOCKED LOOP (ADPLL) – A REVIEW. (2019). Jurnal Teknologi, 82(1). https://doi.org/10.11113/jt.v82.12833