A VT-INSENSITIVE CRYSTAL-LESS CMOS RELAXATION OSCILLATOR WITH MOS PROCESS COMPENSATION in 0.18 µm TECHNOLOGY
DOI:
https://doi.org/10.11113/aej.v15.21621Keywords:
Current reference, crystal-less oscillator, MOS-process compensation, temperature coefficient, voltage-temperature insensitiveAbstract
An on-chip crystal-less relaxation oscillator is presented in this work. It exhibits a self-biased current reference to reduce the overall supply voltage sensitivity in which the input current is made to directly depend on the output current of the current source itself instead of having an input current connected directly to the supply voltage. The temperature compensation is achieved from bipolar bandgap topology in order to take advantage of summing the proportional-to-absolute-temperature (PTAT) current and the complementary-to-absolute-temperature (CTAT) current. Through carefully sized output transistors, a drain current IREF is generated to charge and discharge the oscillating capacitor. This design demonstrates a simple compensation technique that achieves a frequency variation of less than ±1% with a supply voltage of 1.8V input at normal temperature. A linear regulation performance achieves less than ±1% over supply voltage that ranges from 1.62V to 1.98V. A temperature coefficient less than 200ppm/°C is achieved over the temperature range of -10 to 120°C. The whole chip occupies 0.57mm2 (753.3 μm x 753.3 μm) and consumes 700 μW. This oscillator has been designed and analyzed with 0.18μm 1p6m TSMC CMOS process, intended to serve as a clock generator of power electronic systems to improve worst-case power efficiency.
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